CH552 is an enhanced E8051 core MCU, compatible with MCS51 instruction set. 79% of its instructions are single-byte single-cycle instructions. The average instruction speed is 8~15 times faster than that of standard MCS51. CH552 supports up to 24MHz system clock frequency. CH552 has built-in 16K program memory ROM, 256-byte internal iRAM and 1K-byte internal xRAM. And xRAM supports direct memory access (DMA). CH552 has built-in ADC, capacitive touch-key detection, 3 timers and signal capture and PWM, 2 UARTs, SPI, USB device controller and full-speed transceiver, USB type-C and other functional modules.
System Block Diagram
- Enhanced E8051 core CPU, the speed is 8-15 times faster than that of standard MCS51, with special XRAM data fast copy instruction.
- Built-in 16KB Code Flash, 1KB XRAM and internal 256B iRAM. 128B DataFlash. Support read/write by bytes.
- Built-in 2KB BootLoader. ISP through USB or UART. ISP library is provided.
- Built-in USB controller and USB transceiver support USB device mode, USB type-C master/slave detection, USB2.0 full-speed (12Mbps) and low-speed (1.5Mbps) transfer. Support up to 64 bytes of data packet, with built-in FIFO, and support DMA.
- Built-in USB controller and USB transceiver support USB2.0 full-speed and low-speed master/slave mode, support up to 64 bytes of data packet, with built-in FIFO, and support DMA.
- 3 timers/counters. 2-channel signal capture and 2-channel PWM output.
- 2 full-duplex UARTs support high-baud-rate communication. UART0 is a standard MCS51 serial port.
- One SPI communication interface with built-in FIFO supports master/slave mode.
- 4-channel 8-bit ADC. Voltage comparator.
- 6-channel capacitive detection, up to 15 touch-keys. Support independent timing interrupt.
- 4 reset signal sources. Built-in power-on reset. Software and watchdog overflow reset, and external reset.
- Built-in 24MHz clock source and PLL. An external crystal oscillator is also supported.
- Built-in low voltage regulator from 5V to 3.3V, support 5V, 3.3V and even 2.8V supply voltage. Support low-power sleep, and support externally wake up USB, UART0, UART1, SPI0 and parts of GPIOs.
- Unique ID.
- Packages: TSSOP-20, SOP-16, QNF16, MSOP-10.
Downloading: USB interface / UART