32-bit General Enhanced RISC-V MCU – CH32V103


The CH32V103 is a general purpose microcontroller based on the 32-bit RISC processor RISC-V3A. The CH32V103 provides clock security system, multi-level power management and general DMA controller. The CH32V103 is also equipped with abundant peripheral resources, such as single USB2.0 host/device interface, multi-channel 12-bit ADC module, multi-channel TouchKey, several timers, and multi-channel IIC/USART/SPI interfaces, etc.

System Block Diagram


  • Qingke V3A processor, max 80MHz system clock frequency.
  • Single-cycle multiplication and hardware division.
  • 20KB SRAM, 64KB CodeFlash.
  • 2.7V to 5.5V supply voltage, supplies to GPIO simultaneously.
  • Low-power modes: sleep/stop/standby.
  • Power-on/power-down reset (POR/PDR).
  • Programmable voltage detector (PVD).
  • 7-channel DMA controller.
  • 16-channel TouchKey detection.
  • 16-channel 12-bit ADC.
  • 7 timers.
  • One USB2.0 host/device interface (full-speed and low-speed).
  • Two I2C interfaces (support SMBus/PMBus).
  • 3 USARTs.
  • 2 SPIs (Master mode and Slave mode).
  • 51 I/O ports, all I/O ports can be mapped to 16 external interrupts.
  • CRC calculation unit, 96-bit unique ID.
  • Serial debug interface (SDI).
  • Packages: LQFP64M, LQFP48, QFN48.

Product Selection Guide

Technical Resources

  1. Datasheet: CH32V103DS0.PDFCH32xRM.PDF
  2. CH32V103EVT evaluation board manual and reference routines: CH32V103EVT.ZIP
  3. Integrated development environment (IDE): MounRiver Studio(MRS)